Field Programmable Gate Arrays (FPGAs) provide digital engineers with the ability to rapidly implement digital circuits for a wide range of single-input single-output (SISO) and multiple-input multiple-output (MIMO) applications. At present, analog engineers do not have a comparable tool that operates over a broad frequency range. Attempts have been made to develop an analog equivalent to the FPGA, but the current state of technology is limited to narrowband field programmable analog array (FPAA) applications.
FPGAs provide programmability to customers to test and revise their designs quickly and with minimum development cost. This minimizes the time to market. In addition, the FPGA can be upgraded in the field which allows the customer to modify the design after the electronic system has been shipped. Recent market trends suggest that customers are increasingly using FPGA not only for prototyping, but also in production designs. The Department of Defense Joint Tactical Radio System (JTRS) is a good example. However, these advantages come at a price. Programmability requires a larger die size which translates to higher per unit cost when compared to application specific integrated circuits (ASICs). FPGAs also have higher power consumption for wideband or high data rate signals because of the high sampling rate required to comply with the Nyquist criteria and contributes to propagation delay.
Although the equivalency between digital and analog signal processing was long established, the technology development and market acceptance of the former outpaced the latter for at least four reasons. One, the digital signal is less susceptible to interference than an analog one. Two, a digital system is software based and, hence, the implemented functionality can be changed easily. Three, there is an increasing ability to apply complex mathematical techniques to digital signals and, finally, the availability of deep submicron CMOS technology.
Research on FPAAs began to appear in the academic literature in the early 1990s. Continued research and development over the past 15 to 20 years has led to greater consensus regarding FPAA architectural principles. Standard terms such as CABs (Configurable Analog Blocks) have sprung up, built from common constructions which use op amps and programmable passive components such as switched capacitor and resistor arrays. These CAB sub-components can act as integrators, summers, and attenuators which provide networks of CABs with higher-level functionality. The resultant FPAA has applications in filtering, amplification, signal conditioning, and waveform synthesis, among others.
FPAA designs have been advancing in the last several years. An FPAA developed at Georgia Tech is an integrated device containing CABs and interconnects between these blocks. It is intended to impact analog signal processing in two ways. First, it performs the function of all rapid prototyping devices in reducing development time. Second, it is a platform for implementing advanced signal processing functions, usually reserved for a digital system, in analog circuits.
Recently there have been several breakthroughs in the FPAA research. First, there is an increasing trend towards the use of high frequency, small geometry CMOS op amps as the major functional block of a CAB. Madian introduced an FPAA using CMOS Current Feedback Op Amps (CFOA) in a switch matrix specially built for high frequency, programmable filtering applications. A key drawback is low demonstrated bandwidth (order of 1 MHz). Becker created an FPAA in 130 nm CMOS using Operational Transconductance Amplifiers arranged in a hexagonal topology to achieve a routing network which avoids band-limiting switches. Here, the emphasis was on high bandwidth (order of 100 MHz) and low power consumption (<70 mW). The hexagonal structure allows for odd-order feedback in addition to even-order feedback. Unfortunately, this design suffers from poor scalability (single filter at a time with a 7th order maximum). It can be surmised that these new types of FPAAs will soon be used to demonstrate a wide variety of MIMO applications, particularly in advanced radar and wireless communications systems. However, wider bandwidth and sufficiently low power consumption per channel are first required.